
tanlan-bag:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400480 <_init>:
  400480:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400484:	910003fd 	mov	x29, sp
  400488:	94000030 	bl	400548 <call_weak_fn>
  40048c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400490:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004a0 <.plt>:
  4004a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004a4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf5a0>
  4004a8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ac:	913fe210 	add	x16, x16, #0xff8
  4004b0:	d61f0220 	br	x17
  4004b4:	d503201f 	nop
  4004b8:	d503201f 	nop
  4004bc:	d503201f 	nop

00000000004004c0 <__libc_start_main@plt>:
  4004c0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004c4:	f9400211 	ldr	x17, [x16]
  4004c8:	91000210 	add	x16, x16, #0x0
  4004cc:	d61f0220 	br	x17

00000000004004d0 <__gmon_start__@plt>:
  4004d0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004d4:	f9400611 	ldr	x17, [x16, #8]
  4004d8:	91002210 	add	x16, x16, #0x8
  4004dc:	d61f0220 	br	x17

00000000004004e0 <abort@plt>:
  4004e0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004e4:	f9400a11 	ldr	x17, [x16, #16]
  4004e8:	91004210 	add	x16, x16, #0x10
  4004ec:	d61f0220 	br	x17

00000000004004f0 <printf@plt>:
  4004f0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004f4:	f9400e11 	ldr	x17, [x16, #24]
  4004f8:	91006210 	add	x16, x16, #0x18
  4004fc:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400500 <_start>:
  400500:	d280001d 	mov	x29, #0x0                   	// #0
  400504:	d280001e 	mov	x30, #0x0                   	// #0
  400508:	aa0003e5 	mov	x5, x0
  40050c:	f94003e1 	ldr	x1, [sp]
  400510:	910023e2 	add	x2, sp, #0x8
  400514:	910003e6 	mov	x6, sp
  400518:	580000c0 	ldr	x0, 400530 <_start+0x30>
  40051c:	580000e3 	ldr	x3, 400538 <_start+0x38>
  400520:	58000104 	ldr	x4, 400540 <_start+0x40>
  400524:	97ffffe7 	bl	4004c0 <__libc_start_main@plt>
  400528:	97ffffee 	bl	4004e0 <abort@plt>
  40052c:	00000000 	.inst	0x00000000 ; undefined
  400530:	004008d4 	.word	0x004008d4
  400534:	00000000 	.word	0x00000000
  400538:	004008f0 	.word	0x004008f0
  40053c:	00000000 	.word	0x00000000
  400540:	00400970 	.word	0x00400970
  400544:	00000000 	.word	0x00000000

0000000000400548 <call_weak_fn>:
  400548:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf5a0>
  40054c:	f947f000 	ldr	x0, [x0, #4064]
  400550:	b4000040 	cbz	x0, 400558 <call_weak_fn+0x10>
  400554:	17ffffdf 	b	4004d0 <__gmon_start__@plt>
  400558:	d65f03c0 	ret
  40055c:	00000000 	.inst	0x00000000 ; undefined

0000000000400560 <deregister_tm_clones>:
  400560:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400564:	9100c000 	add	x0, x0, #0x30
  400568:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40056c:	9100c021 	add	x1, x1, #0x30
  400570:	eb00003f 	cmp	x1, x0
  400574:	540000a0 	b.eq	400588 <deregister_tm_clones+0x28>  // b.none
  400578:	90000001 	adrp	x1, 400000 <_init-0x480>
  40057c:	f944c821 	ldr	x1, [x1, #2448]
  400580:	b4000041 	cbz	x1, 400588 <deregister_tm_clones+0x28>
  400584:	d61f0020 	br	x1
  400588:	d65f03c0 	ret
  40058c:	d503201f 	nop

0000000000400590 <register_tm_clones>:
  400590:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400594:	9100c000 	add	x0, x0, #0x30
  400598:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40059c:	9100c021 	add	x1, x1, #0x30
  4005a0:	cb000021 	sub	x1, x1, x0
  4005a4:	9343fc21 	asr	x1, x1, #3
  4005a8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005ac:	9341fc21 	asr	x1, x1, #1
  4005b0:	b40000a1 	cbz	x1, 4005c4 <register_tm_clones+0x34>
  4005b4:	90000002 	adrp	x2, 400000 <_init-0x480>
  4005b8:	f944cc42 	ldr	x2, [x2, #2456]
  4005bc:	b4000042 	cbz	x2, 4005c4 <register_tm_clones+0x34>
  4005c0:	d61f0040 	br	x2
  4005c4:	d65f03c0 	ret

00000000004005c8 <__do_global_dtors_aux>:
  4005c8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005cc:	910003fd 	mov	x29, sp
  4005d0:	f9000bf3 	str	x19, [sp, #16]
  4005d4:	b0000093 	adrp	x19, 411000 <__libc_start_main@GLIBC_2.17>
  4005d8:	3940c260 	ldrb	w0, [x19, #48]
  4005dc:	35000080 	cbnz	w0, 4005ec <__do_global_dtors_aux+0x24>
  4005e0:	97ffffe0 	bl	400560 <deregister_tm_clones>
  4005e4:	52800020 	mov	w0, #0x1                   	// #1
  4005e8:	3900c260 	strb	w0, [x19, #48]
  4005ec:	f9400bf3 	ldr	x19, [sp, #16]
  4005f0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005f4:	d65f03c0 	ret

00000000004005f8 <frame_dummy>:
  4005f8:	17ffffe6 	b	400590 <register_tm_clones>

00000000004005fc <print_result>:
  4005fc:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400600:	910003fd 	mov	x29, sp
  400604:	f9000fa0 	str	x0, [x29, #24]
  400608:	f9400fa0 	ldr	x0, [x29, #24]
  40060c:	b9400001 	ldr	w1, [x0]
  400610:	f9400fa0 	ldr	x0, [x29, #24]
  400614:	b9400402 	ldr	w2, [x0, #4]
  400618:	f9400fa0 	ldr	x0, [x29, #24]
  40061c:	b9400803 	ldr	w3, [x0, #8]
  400620:	90000000 	adrp	x0, 400000 <_init-0x480>
  400624:	91268000 	add	x0, x0, #0x9a0
  400628:	97ffffb2 	bl	4004f0 <printf@plt>
  40062c:	d503201f 	nop
  400630:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400634:	d65f03c0 	ret

0000000000400638 <choose_func1>:
  400638:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40063c:	910003fd 	mov	x29, sp
  400640:	f9000fa0 	str	x0, [x29, #24]
  400644:	b90017a1 	str	w1, [x29, #20]
  400648:	12800000 	mov	w0, #0xffffffff            	// #-1
  40064c:	b9002fa0 	str	w0, [x29, #44]
  400650:	b9002bbf 	str	wzr, [x29, #40]
  400654:	b90027bf 	str	wzr, [x29, #36]
  400658:	1400002b 	b	400704 <choose_func1+0xcc>
  40065c:	b98027a1 	ldrsw	x1, [x29, #36]
  400660:	aa0103e0 	mov	x0, x1
  400664:	d37ff800 	lsl	x0, x0, #1
  400668:	8b010000 	add	x0, x0, x1
  40066c:	d37ef400 	lsl	x0, x0, #2
  400670:	aa0003e1 	mov	x1, x0
  400674:	f9400fa0 	ldr	x0, [x29, #24]
  400678:	8b010000 	add	x0, x0, x1
  40067c:	b9400800 	ldr	w0, [x0, #8]
  400680:	7100001f 	cmp	w0, #0x0
  400684:	540003a1 	b.ne	4006f8 <choose_func1+0xc0>  // b.any
  400688:	b98027a1 	ldrsw	x1, [x29, #36]
  40068c:	aa0103e0 	mov	x0, x1
  400690:	d37ff800 	lsl	x0, x0, #1
  400694:	8b010000 	add	x0, x0, x1
  400698:	d37ef400 	lsl	x0, x0, #2
  40069c:	aa0003e1 	mov	x1, x0
  4006a0:	f9400fa0 	ldr	x0, [x29, #24]
  4006a4:	8b010000 	add	x0, x0, x1
  4006a8:	b9400400 	ldr	w0, [x0, #4]
  4006ac:	b9402ba1 	ldr	w1, [x29, #40]
  4006b0:	6b00003f 	cmp	w1, w0
  4006b4:	5400022a 	b.ge	4006f8 <choose_func1+0xc0>  // b.tcont
  4006b8:	b98027a1 	ldrsw	x1, [x29, #36]
  4006bc:	aa0103e0 	mov	x0, x1
  4006c0:	d37ff800 	lsl	x0, x0, #1
  4006c4:	8b010000 	add	x0, x0, x1
  4006c8:	d37ef400 	lsl	x0, x0, #2
  4006cc:	aa0003e1 	mov	x1, x0
  4006d0:	f9400fa0 	ldr	x0, [x29, #24]
  4006d4:	8b010000 	add	x0, x0, x1
  4006d8:	b9400400 	ldr	w0, [x0, #4]
  4006dc:	b9002ba0 	str	w0, [x29, #40]
  4006e0:	90000000 	adrp	x0, 400000 <_init-0x480>
  4006e4:	9126e000 	add	x0, x0, #0x9b8
  4006e8:	b9402ba1 	ldr	w1, [x29, #40]
  4006ec:	97ffff81 	bl	4004f0 <printf@plt>
  4006f0:	b94027a0 	ldr	w0, [x29, #36]
  4006f4:	b9002fa0 	str	w0, [x29, #44]
  4006f8:	b94027a0 	ldr	w0, [x29, #36]
  4006fc:	11000400 	add	w0, w0, #0x1
  400700:	b90027a0 	str	w0, [x29, #36]
  400704:	b94027a0 	ldr	w0, [x29, #36]
  400708:	7100181f 	cmp	w0, #0x6
  40070c:	54fffa8d 	b.le	40065c <choose_func1+0x24>
  400710:	b9402fa0 	ldr	w0, [x29, #44]
  400714:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400718:	d65f03c0 	ret

000000000040071c <greedy_algo>:
  40071c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400720:	910003fd 	mov	x29, sp
  400724:	f9000fa0 	str	x0, [x29, #24]
  400728:	f9000ba1 	str	x1, [x29, #16]
  40072c:	b9002fbf 	str	wzr, [x29, #44]
  400730:	1400002d 	b	4007e4 <greedy_algo+0xc8>
  400734:	f9400fa2 	ldr	x2, [x29, #24]
  400738:	b9802ba1 	ldrsw	x1, [x29, #40]
  40073c:	aa0103e0 	mov	x0, x1
  400740:	d37ff800 	lsl	x0, x0, #1
  400744:	8b010000 	add	x0, x0, x1
  400748:	d37ef400 	lsl	x0, x0, #2
  40074c:	8b000040 	add	x0, x2, x0
  400750:	b9400001 	ldr	w1, [x0]
  400754:	b9402fa0 	ldr	w0, [x29, #44]
  400758:	0b000021 	add	w1, w1, w0
  40075c:	f9400fa0 	ldr	x0, [x29, #24]
  400760:	b9405400 	ldr	w0, [x0, #84]
  400764:	6b00003f 	cmp	w1, w0
  400768:	540002cc 	b.gt	4007c0 <greedy_algo+0xa4>
  40076c:	f9400fa2 	ldr	x2, [x29, #24]
  400770:	b9802ba1 	ldrsw	x1, [x29, #40]
  400774:	aa0103e0 	mov	x0, x1
  400778:	d37ff800 	lsl	x0, x0, #1
  40077c:	8b010000 	add	x0, x0, x1
  400780:	d37ef400 	lsl	x0, x0, #2
  400784:	8b000040 	add	x0, x2, x0
  400788:	52800021 	mov	w1, #0x1                   	// #1
  40078c:	b9000801 	str	w1, [x0, #8]
  400790:	f9400fa2 	ldr	x2, [x29, #24]
  400794:	b9802ba1 	ldrsw	x1, [x29, #40]
  400798:	aa0103e0 	mov	x0, x1
  40079c:	d37ff800 	lsl	x0, x0, #1
  4007a0:	8b010000 	add	x0, x0, x1
  4007a4:	d37ef400 	lsl	x0, x0, #2
  4007a8:	8b000040 	add	x0, x2, x0
  4007ac:	b9400000 	ldr	w0, [x0]
  4007b0:	b9402fa1 	ldr	w1, [x29, #44]
  4007b4:	0b000020 	add	w0, w1, w0
  4007b8:	b9002fa0 	str	w0, [x29, #44]
  4007bc:	1400000a 	b	4007e4 <greedy_algo+0xc8>
  4007c0:	f9400fa2 	ldr	x2, [x29, #24]
  4007c4:	b9802ba1 	ldrsw	x1, [x29, #40]
  4007c8:	aa0103e0 	mov	x0, x1
  4007cc:	d37ff800 	lsl	x0, x0, #1
  4007d0:	8b010000 	add	x0, x0, x1
  4007d4:	d37ef400 	lsl	x0, x0, #2
  4007d8:	8b000040 	add	x0, x2, x0
  4007dc:	52800041 	mov	w1, #0x2                   	// #2
  4007e0:	b9000801 	str	w1, [x0, #8]
  4007e4:	f9400fa3 	ldr	x3, [x29, #24]
  4007e8:	f9400fa0 	ldr	x0, [x29, #24]
  4007ec:	b9405401 	ldr	w1, [x0, #84]
  4007f0:	b9402fa0 	ldr	w0, [x29, #44]
  4007f4:	4b000020 	sub	w0, w1, w0
  4007f8:	f9400ba2 	ldr	x2, [x29, #16]
  4007fc:	2a0003e1 	mov	w1, w0
  400800:	aa0303e0 	mov	x0, x3
  400804:	d63f0040 	blr	x2
  400808:	b9002ba0 	str	w0, [x29, #40]
  40080c:	b9402ba0 	ldr	w0, [x29, #40]
  400810:	3100041f 	cmn	w0, #0x1
  400814:	54fff901 	b.ne	400734 <greedy_algo+0x18>  // b.any
  400818:	f9400fa0 	ldr	x0, [x29, #24]
  40081c:	97ffff78 	bl	4005fc <print_result>
  400820:	d503201f 	nop
  400824:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400828:	d65f03c0 	ret

000000000040082c <tanlan_bag>:
  40082c:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  400830:	910003fd 	mov	x29, sp
  400834:	90000000 	adrp	x0, 400000 <_init-0x480>
  400838:	91272001 	add	x1, x0, #0x9c8
  40083c:	910243a0 	add	x0, x29, #0x90
  400840:	a9400c22 	ldp	x2, x3, [x1]
  400844:	a9000c02 	stp	x2, x3, [x0]
  400848:	f9400822 	ldr	x2, [x1, #16]
  40084c:	f9000802 	str	x2, [x0, #16]
  400850:	b9401821 	ldr	w1, [x1, #24]
  400854:	b9001801 	str	w1, [x0, #24]
  400858:	90000000 	adrp	x0, 400000 <_init-0x480>
  40085c:	9127a001 	add	x1, x0, #0x9e8
  400860:	9101c3a0 	add	x0, x29, #0x70
  400864:	a9400c22 	ldp	x2, x3, [x1]
  400868:	a9000c02 	stp	x2, x3, [x0]
  40086c:	f9400822 	ldr	x2, [x1, #16]
  400870:	f9000802 	str	x2, [x0, #16]
  400874:	b9401821 	ldr	w1, [x1, #24]
  400878:	b9001801 	str	w1, [x0, #24]
  40087c:	90000000 	adrp	x0, 400000 <_init-0x480>
  400880:	91282001 	add	x1, x0, #0xa08
  400884:	910063a0 	add	x0, x29, #0x18
  400888:	a9400c22 	ldp	x2, x3, [x1]
  40088c:	a9000c02 	stp	x2, x3, [x0]
  400890:	a9410c22 	ldp	x2, x3, [x1, #16]
  400894:	a9010c02 	stp	x2, x3, [x0, #16]
  400898:	a9420c22 	ldp	x2, x3, [x1, #32]
  40089c:	a9020c02 	stp	x2, x3, [x0, #32]
  4008a0:	a9430c22 	ldp	x2, x3, [x1, #48]
  4008a4:	a9030c02 	stp	x2, x3, [x0, #48]
  4008a8:	a9440c22 	ldp	x2, x3, [x1, #64]
  4008ac:	a9040c02 	stp	x2, x3, [x0, #64]
  4008b0:	f9402821 	ldr	x1, [x1, #80]
  4008b4:	f9002801 	str	x1, [x0, #80]
  4008b8:	90000000 	adrp	x0, 400000 <_init-0x480>
  4008bc:	9118e001 	add	x1, x0, #0x638
  4008c0:	910063a0 	add	x0, x29, #0x18
  4008c4:	97ffff96 	bl	40071c <greedy_algo>
  4008c8:	d503201f 	nop
  4008cc:	a8cb7bfd 	ldp	x29, x30, [sp], #176
  4008d0:	d65f03c0 	ret

00000000004008d4 <main>:
  4008d4:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4008d8:	910003fd 	mov	x29, sp
  4008dc:	97ffffd4 	bl	40082c <tanlan_bag>
  4008e0:	d503201f 	nop
  4008e4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4008e8:	d65f03c0 	ret
  4008ec:	00000000 	.inst	0x00000000 ; undefined

00000000004008f0 <__libc_csu_init>:
  4008f0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4008f4:	910003fd 	mov	x29, sp
  4008f8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4008fc:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf5a0>
  400900:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf5a0>
  400904:	91374294 	add	x20, x20, #0xdd0
  400908:	913722b5 	add	x21, x21, #0xdc8
  40090c:	a902dff6 	stp	x22, x23, [sp, #40]
  400910:	cb150294 	sub	x20, x20, x21
  400914:	f9001ff8 	str	x24, [sp, #56]
  400918:	2a0003f6 	mov	w22, w0
  40091c:	aa0103f7 	mov	x23, x1
  400920:	9343fe94 	asr	x20, x20, #3
  400924:	aa0203f8 	mov	x24, x2
  400928:	97fffed6 	bl	400480 <_init>
  40092c:	b4000194 	cbz	x20, 40095c <__libc_csu_init+0x6c>
  400930:	f9000bb3 	str	x19, [x29, #16]
  400934:	d2800013 	mov	x19, #0x0                   	// #0
  400938:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40093c:	aa1803e2 	mov	x2, x24
  400940:	aa1703e1 	mov	x1, x23
  400944:	2a1603e0 	mov	w0, w22
  400948:	91000673 	add	x19, x19, #0x1
  40094c:	d63f0060 	blr	x3
  400950:	eb13029f 	cmp	x20, x19
  400954:	54ffff21 	b.ne	400938 <__libc_csu_init+0x48>  // b.any
  400958:	f9400bb3 	ldr	x19, [x29, #16]
  40095c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400960:	a942dff6 	ldp	x22, x23, [sp, #40]
  400964:	f9401ff8 	ldr	x24, [sp, #56]
  400968:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40096c:	d65f03c0 	ret

0000000000400970 <__libc_csu_fini>:
  400970:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400974 <_fini>:
  400974:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400978:	910003fd 	mov	x29, sp
  40097c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400980:	d65f03c0 	ret
